Informatics Publishing Limited

P. Tirumala Rao ¹, P. Siva Kumar ¹, Y. V. Apparao ², N. Santosh Kumar ¹

Affiliations
1 ECE Department, Vignan's Institute of Information Technology, IN
2 ECE Department, GITAM University, IN

Abstract

Pulse compression technique is most widely used in radar and communication areas. The radar pulse compression codes must have good merit factor and discrimination factor. But there are several signal design problems which are reported in the literature and these signal design problems can be solved through binary, Ternary, Quinquenary and six phase pulse compression sequences. Hence VLSI architectures to generate such radar pulse compression sequences were developed. But when we are moving from binary to ternary and ternary to six phase pulse compression VLSI systems, the memory requirements are increased there by the area is increased. The good VLSI design needs optimization of the area, speed, power consumption. This paper concentrates on developing area optimized VLSI architecture to generate radar pulse compression sequences without sacrificing the speed of the system. The other interesting thing about this paper is the proposed single chip VLSI architecture can generate all the phase coded pulse compression sequences like Binary, Ternary, Quaternary, Quinquenary, 6-phase and other poly phase sequences. The VLSI architecture is implemented on the Field Programmable Gate Array (FPGA) as it provides the flexibility of reconfigurability and reprogrammability.

Keywords

FPGA, Merit Factor, PULSE Compression, Side Lobe Energy, Six Phase Pulse Compression.

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M. Lakshmanan ¹, V. Noor Mohammed ¹, M. Palanivelan ², P. Siva Kumar ¹

Affiliations
1 School of Electronics Engineering, VIT University, Vellore - 632014, Tamil Nadu, IN
2 Department of ECE, Rajalakshmi Engineering College, Chennai- 602105, Tamil Nadu, IN

Abstract

Objective: The design of wireless networks mainly focuses on resource allocation and energy efficient schemes to meet the increasing demands. Methods/Analysis: In this paper, we proposed an algorithm for Resource block (RB) allocation and Transmit power control in Long term evolution (LTE) downlink heterogeneous networks. Findings: Energy efficiency is increased by increasing the number of smaller cells. To satisfy the required user throughput energy efficiency is minimized and suitable resource block allocation is maximized. Novelty/Improvement: In the proposed power control algorithm, user is allowed to select minimum powers to reduce power of Evolved NodeB (eNB).

Keywords

Energy efficiency (EE), LTE, Macro (MeNB), Resource Block (RB), Small eNodeB (SeNB).

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P. Siva Kumar ¹, S. Kothai Nayaki ², M. Swaminathan ²

Affiliations
1 Department of Chemistry, Annamalai University, Annamalainagar, Tamilnadu, IN
2 Chemistry Section, Annamalai University, Annamalainagar, Tamilnadu, IN

Abstract

The absorption and fluorescence spectral properties of 2-amino-4,6-diphenylpyrimidine (ADP) have been investigated in a series of organic solvents of different polarity and in aqueous solutions with Ho/pH/H_ in the range -10 to 17. The largely red shifted fluorescence maximum observed in hydrogen bonding solvents can be attributed to dual intermolecular hydrogen bonding interaction between ADP and the solvents. The correlation between the Stokes shifts and the solvent polarity parameters, is better with ET (30) than with BK values. The low value of correlation coefficient may be due to the presence of both intra-and dual intermolecular hydrogen bonding in polar solvents.The acidity constants for various prototropic reactions in So and S1 states are determined and discussed.

Keywords

2-Amino-4,6-Diphenylpyrimidine, Hydrogen Bonding Interactions, Prototropic Reaction, Solvent Polarity Parameters, Acidity Constant Values.

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